Silicon carbide (SiC) is a wide band-gap semiconductor having as wide a forbidden bandwidth as 2.2 to 3.3 eV, and is a subject of research and development as an environmentally-resistant semiconductor material because of its superior physical and chemical properties. SiC in recent years is particularly attracting attention as a material for short-wavelength (blue to ultraviolet) optical devices, high-frequency electronic devices, and high-withstand voltage, high-power electronic devices, and the research and development of SiC is active in that field. However, manufacturing a large-diameter single crystal of fine quality SiC is believed to be difficult, which has hindered the practical application of SiC devices.
A laboratory or a facility of a similar scale in the past has used, for example, the sublimation-recrystallization method (Lely method) to obtain a SiC single crystal of a size large enough to manufacture a semiconductor device. With this method, however, the resultant single crystal is small in area and it is difficult to control the dimensions and shape of the single crystal, as well as polytype and impurity carrier concentration. Another method that has been practiced uses chemical vapor deposition (CVD) to grow a cubic SiC single crystal through heteroepitaxial growth on a substrate made of a different material such as silicon (Si). The SiC single crystal grown by this method is large in area but contains many defects (up to ×107/cm2) due to an approximately 20% of SiC—Si lattice mismatch, and the method has not been successful in producing a high-quality SiC single crystal.
In order to solve these problems, the modified Lely method has been proposed, which uses a SiC single crystal wafer as a seed crystal for sublimation-recrystallization (see Non Patent Literature 1). The modified Lely method is capable of growing a SiC single crystal while controlling the polytype (6H, 4H, 15R, or the like), shape, carrier type, and carrier concentration. Of two hundred or more SiC polytypes, the 4H polytype is deemed the best in terms of crystal productivity and electronic device performance, and a SiC single crystal that is produced commercially is often 4H. Most of single crystal ingots are grown to have an n-type conductivity because nitrogen is a dopant that is easy to handle. In communication device uses, however, crystals of high resistivity, which hardly contain a dopant element, are manufactured as well.
Today, a SiC single crystal wafer having a diameter of 51 mm (2 inches) to 100 mm is cut out from a SiC single crystal manufactured by the modified Lely method, to be used for the manufacturing of devices in the power electronics field and similar fields. Successful development of a 150-mm wafer has also been reported (see Non Patent Literature 2), and the practical application of devices that use a 100- or 150-mm wafer is expected to start in full scale. Under such circumstances, wafer quality that is expressed by dislocation density or other indices and that has a significant impact on device performance and yield in mass production has come to be given a great importance in recent years.
In the modified Lely method, an unavoidable internal stress is generated in a growing single crystal ingot and remains in the ultimately obtained single crystal wafer in the form of elastic strain or dislocation (plastic strain). SiC wafers commercially available at present have 2×103 to 2×104 basal plane dislocations (hereinafter abbreviated as BPDs) per cm2, 8×102 to 103 threading screw dislocations (hereinafter abbreviated as TSDs) per cm2, and 5×103 to 2×104 threading edge dislocations (hereinafter abbreviated as TEDs) per cm2 (see Non Patent Literature 3).
A study conducted in recent years on crystal defects and devices has reported that BPD generates an oxide film defect in a device, thereby causing dielectric breakdown (see Non Patent Literature 4). In bipolar devices and the like, BPD has also been reported to cause stacking fault and is known to be the cause of deterioration in device characteristics (see Non Patent Literature 5). TSD causes leak current in a device (see Non Patent Literature 6), and is reported to shorten the lifetime of a gate oxide film (see Non Patent Literature 7). A SiC single crystal that has few BPDs and TSDs is therefore sought after in order to manufacture a high-performance SiC device.
There have been reported a plurality of technologies of reducing dislocation density. Examples of the reported technologies include transforming BPDs into TEDs by image force in the epitaxial growth of a SiC thin film with the use of chemical vapor deposition (CVD) (see Non Patent Literature 8), and substantially the same structural transformation in the solution growth method (see Non Patent Literature 9). A transformation of TEDs into BPDs reported by Ohtani et al. is given as an example of a reported technology that uses the sublimation-recrystallization method (see Non Patent Literature 10). However, there is no mention in these documents of the related art to a control method for reducing BPDs by structural transformation in the industrial manufacturing of a SiC single crystal, conditions thereof, and the like.
On the other hand, reported technologies that use the sublimation-recrystallization method include a method of obtaining a SiC single crystal that has few micropipes and few TSDs by growing a SiC single crystal as an initial growth layer at a given growth pressure and substrate temperature, and then growing a crystal by gradually decreasing the substrate temperature and the pressure (see Patent Literature 1). The TSD density of the SiC single crystal obtained by this method, however, is 103 to 104 dislocations per cm2 (see the “Effects of the Invention” section in the specification of Patent Literature 1) and, considering the application to high-performance SiC devices, a further reduction of TSDs is needed.
Another method has been reported in which a SiC single crystal is grown as an initial growth layer at a given growth pressure and substrate temperature, and then a crystal is grown at an increased growth speed by maintaining the substrate temperature and reducing the pressure, to thereby reduce the generation of micropipes and lower the densities of TSD and other dislocations (see Patent Literature 2). The TSD reducing effect of this method is still insufficient.
Reported in Patent Literature 3 is a technology of obtaining a SiC single crystal wafer that is low in mosaicity by, in a sublimation-recrystallization method that uses a seed crystal, growing a SiC single crystal and cutting a seed crystal out of the SiC single crystal to conduct crystal growth again, and repeating this process a number of times so that the shape of the growing crystal is convex in the direction of growth. This technology utilizes the nature of a low-angle grain boundary, namely, an aggregation of dislocations, which is to propagate perpendicular to the growth surface, in order to form in the center of the growing crystal a region that is low in the density of low-angle grain boundaries, i.e., a region low in dislocation density, by shaping the growing crystal into a convex toward the growth direction and thus moving low-angle grain boundaries that are aggregations of dislocations to the perimeter of the growing crystal.
In the modified Lely method, in general, a crystal is grown by setting a temperature gradient in the direction of crystal growth so that the temperature is lower on the seed crystal side than on the side of SiC crystal particles that are the raw material of the growing crystal, and the shape on a growth plane of the growing single crystal can be determined by controlling the temperature distribution in the vicinity of the growth plane. In other words, because the growth plane is formed along an isothermal plane, in order to give the growing crystal a shape that is convex in the growth direction as in Patent Literature 3, for example, an isothermal line that is adequately convex toward the growth direction needs to be formed in a growth space so that a difference between a temperature tp at an arbitrary point on a growth surface in the perimeter of the growing crystal and an ingot center temperature tc equidistant from the crystal seed with respect to the arbitrary point (Δt=tp−tc) is positive. Growing a crystal while forming an isothermal line as this suppresses the generation of a polycrystal and is also known to be important in order to manufacture a quality SiC single crystal ingot of a single polytype by stably growing the objective polytype. However, when a single crystal ingot is manufactured by a growth process of the related art in which the temperature difference Δt is large in a plane perpendicular to the growth direction, there is a risk in that great stress is created within the single crystal.
When the crystal orientation in a wafer plane is misaligned due to a large elastic strain on the wafer, on the other hand, a problem such as a trouble in the step flow of the epitaxial growth process arises and significantly affects device characteristics. A large elastic strain also exacerbates the warping of the wafer in some cases. Wafer warping gives rise to such problems as a focal point shift in the lithography process and the spillover of a raw material gas to the rear surface in the epitaxial growth process. A warped wafer presents obstacles in wafer handling such as transportation in the first place, and also requires consideration to the risk of a chuck causing damage.
As a growth technology that relaxes the internal stress of a single crystal ingot, a single crystal manufacturing apparatus is disclosed in Patent Literature 4. The single crystal manufacturing apparatus has a feature of including a temperature gradient control member, which is disposed in the periphery of a seed crystal or a single crystal grown on the seed crystal, and a local temperature gradient mitigating member, which is installed between the seed crystal or the single crystal and the temperature gradient control member. However, this technology is for preventing the generation and propagation of a crack in the growing crystal by reducing the local maximum value of a temperature gradient created in a single crystal that grows right above the seed crystal, and growth conditions of a site in the growing ingot that is turned into a wafer do not change essentially. The technology of this patent application therefore does not help in reducing the internal stress and dislocation density of a wafer.
The following methods have been reported as means for reducing wafer warping by the relaxing of elastic strain. Reported in Patent Literature 5 is a technology of preventing breaking or cracking in the machining of a SiC single crystal ingot or the device process of a SiC single crystal wafer by annealing the ingot or the wafer at a temperature that is above 2,000° C. and equal to or less than 2,800° C. in a non-corrosive gas atmosphere that contains carbon and hydrogen, or an atmosphere created by mixing these types of non-corrosive gas with argon or helium and thus relaxing the internal stress of the ingot or the wafer. Reported in Patent Literature 6 is a technology of giving a curvature radius of 35 m or more to a wafer that is cut out from a SiC single crystal ingot by performing heat treatment on the wafer at a temperature between 800° C. and 2,400° C. while pressurizing the wafer at 10 MPa or more and 0.5 MPa or less.
These methods may be effective in lessening elastic strain on a wafer, but reconfiguring atoms by externally applying a thermal load that exceeds 2,000° C. to a SiC single crystal involves a temperature raising process and a cooling process, thereby creating a new temperature distribution, and generates a high stress field inside the crystal from the temperature imbalance, with the possibility of generating a new dislocation. This phenomenon is manifested by an increase in the dislocation density of the annealed crystal in an embodiment of Patent Literature 6.